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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
FEATURES:
* 0.5 MICRON CMOS Technology * Typical tSK(o) (Output Skew) < 250ps * ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * VCC = 3.3V 0.3V, Normal Range * VCC = 2.7V to 3.6V, Extended Range * VCC = 2.5V 0.2V * CMOS power levels (0.4 W typ. static) * Rail-to-Rail output swing for increased noise margin * Available in SSOP, TSSOP, and TVSOP packages
IDT74ALVC162525
DESCRIPTION:
This 18-bit registered bus transceiver is built using advanced dual metal CMOS technology. Data flow in each direction is controlled by output-enable (OEAB and OEBA) and clock-enable (CLKENAB and CLKENBA) inputs. For the A-to-B data flow, the data flows through a single register. The B-to-A data can flow through a four-stage pipeline register path, or through a single register path, depending on the state of the select (SEL) input. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input, provided that the appropriate CLKEN inputs are low. The A-to-B data transfer is synchronized to the CLKAB input, and B-to-A data transfer is synchronized with the CLK1BA and CLK2BA inputs. The ALVCH162525 has series resistors in the device output structure of the "B" port which will significantly reduce line noise when used with light loads. This driver has been designed to drive 12mA at the designated threshold levels. The "A" port has a 24mA driver. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The ALVCH162525 has "bus-hold" which retains the inputs' last state whenever the input bus goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors.
DRIVE FEATURES:
* High Output Drivers: 24mA (A port) * Balanced Output Drivers: 12mA (B port)
APPLICATIONS:
* 3.3V high speed systems * 3.3V and lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
CLK AB
55
CLK 1BA
30
CLK 2BA
29
CLKE NBA
28
CLKE NAB
1
OEAB
2
OEBA
27
56
SEL
CE C1 A1
3
1
CE C1
CE C1 1D
CE C1 1D
54
1D
0
1D
B1
CE C1 1D 1 of 18 Channels
To 17 O ther Channels
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
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(c) 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4220/1
IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
CLKENAB OEAB A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA CLKENBA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 SEL CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLK1BA CLK2BA
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VTERM(2) VTERM(3) TSTG IOUT IIK IOK ICC ISS Description Terminal Voltage with Respect to GND Terminal Voltage with Respect to GND Storage Temperature DC Output Current Continuous Clamp Current, VI < 0 or VI > VCC Continuous Clamp Current, VO < 0 Continuous Current through each VCC or GND Max -0.5 to +4.6 -0.5 to VCC+0.5 -65 to +150 -50 to +50 50 -50 100 Unit V V C mA mA mA mA
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VCC terminals. 3. All terminals except VCC.
CAPACITANCE (TA = +25C, F = 1.0MHz)
Symbol CIN COUT COUT Parameter(1) Input Capacitance Output Capacitance I/O Port Capacitance Conditions VIN = 0V VOUT = 0V VIN = 0V Typ. 5 7 7 Max. 7 9 9 Unit pF pF pF
NOTE: 1. As applicable to the device type.
PIN DESCRIPTION
Pin Names CLKAB CLK1BA CLK2BA CLKENBA CLKENAB Description Clock Input for the A to B direction Clock Input for the B to A pipeline register Clock Input for the B to A output register Clock Enable for the CLK1BA and CLK2BA clocks (Active LOW) Clock Enable for the CLKAB clock (Active LOW) Output Enable for the B port (Active LOW) Output Enable for the A port (Active LOW) Select pin for pipelined/non-pipelined mode in the B-to-A direction (Active LOW) Ax Bx A-to-B Data Inputs or B-to-A 3-State Outputs(1) B-to-A Data Inputs or A-to-B 3-State Outputs(1)
SSOP/ TSSOP/ TVSOP TOP VIEW
OEAB OEBA SEL
NOTE: 1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE(1)
A-TO-B STORAGE (OEAB = L)
Inputs CLKENAB H
L L
B-TO-A STORAGE (OEBA = L)
Outputs Inputs CLKENBA H L L L L CLK2BA X CLK1BA X X X SEL X H H L L Bx X L H L H Outputs Ax A
(2) 0
CLKAB X

Ax X
L H
Bx B
(2) 0
L H
L H L(3) H(3)
NOTES: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition 2. Output level before the indicated steady-state input conditions were established 3. Three CLK1BA edges and one CLK2BA edge are needed to propagate data from B to A when SEL is low.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: TA = -40C to +85C
Symbol VIH Parameter Input HIGH Voltage Level VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VIL IIH IIL IOZH IOZL VIK VH ICCL ICCH ICCZ ICC Input LOW Voltage Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current VCC = 2.3V, IIN = -18mA VCC = 3.3V VCC = 3.6V VIN = GND or VCC One input at VCC - 0.6V, other inputs at VCC or GND VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V VCC = 3.6V VCC = 3.6V VI = VCC VI = GND VO = VCC VO = GND Test Conditions Min. 1.7 2 -- -- -- -- -- -- -- -- -- Typ.(1) -- -- -- -- -- -- -- -- -0.7 100 0.1 Max. -- -- 0.7 0.8 5 5 10 10 -1.2 -- 40 V mV A A A A V Unit V
Quiescent Power Supply Current Variation
--
--
750
A
NOTE: 1. Typical values are at VCC = 3.3V, +25C ambient.
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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NOTES: 1. Pins with Bus-Hold are identified in the pin description. 2. Typical values are at VCC = 3.3V, +25C ambient.
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current VCC = 3V VCC = 2.3V VCC = 3.6V
Test Conditions VI = 2V VI = 0.8V VI = 1.7V VI = 0.7V VI = 0 to 3.6V
Min. - 75 75 - 45 45 --
Typ.(2) -- -- -- -- --
Max. -- -- -- -- 500
Unit A A A
OUTPUT DRIVE CHARACTERISTICS (A PORT)
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.3V VCC = 2.7V VCC = 3V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V IOH = - 24mA IOL = 0.1mA IOL = 6mA IOL = 12mA IOL = 12mA IOL = 24mA Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 6mA IOH = - 12mA Min. VCC - 0.2 2 1.7 2.2 2.4 2 -- -- -- -- -- Max. -- -- -- -- -- -- 0.2 0.4 0.7 0.4 0.55 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
OUTPUT DRIVE CHARACTERISTICS (B PORT)
Symbol VOH Parameter Output HIGH Voltage VCC = 2.3V VCC = 2.7V VCC = 3V VOL Output LOW Voltage VCC = 2.3V to 3.6V VCC = 2.3V VCC = 2.7V VCC = 3V Test Conditions(1) VCC = 2.3V to 3.6V IOH = - 0.1mA IOH = - 4mA IOH = - 6mA IOH = - 4mA IOH = - 8mA IOH = - 6mA IOH = - 12mA IOL = 0.1mA IOL = 4mA IOL = 6mA IOL = 4mA IOL = 8mA IOL = 6mA IOL = 12mA Min. VCC - 0.2 1.9 1.7 2.2 2 2.4 2 -- -- -- -- -- -- -- Max. -- -- -- -- -- -- -- 0.2 0.4 0.55 0.4 0.6 0.55 0.8 V Unit V
NOTE: 1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range. TA = - 40C to + 85C.
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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, TA = 25C
VCC = 2.5V 0.2V Symbol CPD CPD Parameter Power Dissipation Capacitance Outputs enabled Power Dissipation Capacitance Outputs disabled Test Conditions CL = 0pF, f = 10Mhz Typical VCC = 3.3V 0.3V Typical 160 160 Unit pF
-- --
SWITCHING CHARACTERISTICS (FOR A AND B PORTS)(1)
VCC = 2.5V 0.2V Symbol fMAX tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSU tSU tSU tSU tSU tSU tSU tH tH tH tH tH tH tH tW tSK(O) Propagation Delay CLKAB to 2Bx Propagation Delay CLK2BA to Ax Output Enable Time OEAB to Bx Output Enable Time OEBA to Ax Output Disable Time OEAB to Bx Output Disable Time OEBA to Ax Set-up Time, Ax data before CLKAB Set-up Time, Bx data before CLK2BA Set-up Time, Bx data before CLK1BA Set-up Time, SEL before CLK2BA Set-up Time, CLKENAB before CLKAB Set-up Time, CLKENBA before CLK1BA Set-up Time, CLKENBA before CLK2BA Hold Time, Ax data after CLKAB Hold Time, Bx data before CLK2BA Hold Time, Bx data before CLK1BA Hold Time, SEL before CLK2BA Hold Time, CLKENAB before CLKAB Hold Time, CLKENBA before CLK1BA Hold Time, CLKENBA before CLK2BA Pulse Duration, CLK HIGH or LOW Output Skew(2) 1.3 2.1 1.3 3.3 2.1 2.7 2.7 0.7 0.4 0.8 0 0.1 0 0 3.2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1.3 1.8 1.2 3.3 1.9 2.5 2.5 0.4 0 0.4 0 0.3 0 0 3.2 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1.3 1.7 1.1 3.3 1.6 2.1 2.2 0.9 0.6 1 0.1 0.3 0.1 0 3 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 500 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ps 1 6.3 -- 5.4 1 4.9 ns 1 6.3 -- 5.4 1 4.9 ns 1 6.1 -- 6.1 1 5.1 ns 1 6.7 -- 6.8 1 5.7 ns 1 4.5 -- 4.4 1 4.2 ns Parameter Min. 120 1 Max. -- 5.5 VCC = 2.7V Min. 125 -- Max. -- 5.4 VCC = 3.3V 0.3V Min. 150 1 Max. -- 4.7 Unit MHz ns
NOTES: 1. See TEST CIRCUITS AND WAVEFORMS. TA = - 40C to + 85C. 2. Skew between any two outputs of the same package and switching in the same direction.
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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
VIH VT 0V VOH VT VOL VIH VT 0V
ALVC Link
TEST CIRCUITS AND WAVEFORMS TEST CONDITIONS
Symbol VLOAD VIH VT VLZ VHZ CL VCC(1)= 3.3V0.3V VCC(1)= 2.7V 6 2.7 1.5 300 300 50
VCC 500 Pulse Generator
(1, 2)
SAME PHASE INPUT TRANSITION
VCC(2)= 2.5V0.2V 2 x Vcc Vcc Vcc / 2 150 150 30
Unit V V V mV mV pF
VLOAD Open GND
tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION
tPHL
6 2.7 1.5 300 300 50
tPHL
Propagation Delay
ENABLE CONTROL INPUT tPZL OUTPUT SW ITCH NORMALLY CLOSED LOW tPZH OUTPUT SW ITCH NORMALLY OPEN HIGH VLOAD/2 VT tPHZ VT 0V tPLZ DISABLE VIH VT 0V VLOAD/2 VLZ VOL VOH VHZ 0V
ALVC Link
VIN D.U.T.
VOUT
RT
500 CL
ALVC Link
Test Circuit for All Outputs
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. NOTES: 1. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2ns; tR 2ns.
Enable and Disable Times
NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. VIH DATA VT INPUT 0V tSU tH VIH TIMING VT INPUT 0V tREM VIH ASYNCHRONOUS VT CONTROL 0V VIH SYNCHRONOUS VT CONTROL tSU 0V tH
ALVC Link
SWITCH POSITION
Test Open Drain Disable Low Enable Low Disable High Enable High All Other Tests Switch VLOAD GND Open
VIH INPUT VT 0V VOH OUTPUT 1 VT VOL VOH OUTPUT 2 tPLH2 tPHL2
ALVC Link
Set-up, Hold, and Release Times
tPLH1
tPHL1
LOW-HIGH-LOW PULSE tW HIGH-LOW -HIGH PULSE
VT
tSK (x)
tSK (x)
VT VOL
VT
ALVC Link
Pulse Width
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
Output Skew - tSK(X)
NOTES: 1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs. 2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
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IDT74ALVC162525 3.3V CMOS 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX ALVC X XX Family XXX Device Type XX Package Temp. Range Bus-Hold
PV PA PF 525 162 H 74
Shrink Small Outline Package Thin Shrink Small Outline Package Thin Very Small Outline Package 18-Bit Registered Bus Transceiver with 3-State Outputs Double-Density with Resistors, 12mA (B Port) 24m A (A Port) Bus-Hold -40C to +85C
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